I graduated highschool in June 2024, but decided not to attend university. Instead, I created Instachip, an EDA start-up company, and decided to go through a program called Y Combinator. I worked on chip design tooling for a bit, but decided to drop out of the Y Combinator program and join a chip company called Etched. Concurrently, I am working on Formal Verification research with Dr. Mark Santolucito at Columbia University.

Beyond foundational mathematics knowledge from Thomas Jefferson High School for Science and Technology, I am self-taught via textbooks and projects. I was inspired by Code.org when I was 7. When I was 10, I taught myself basic Combinatorics, Statistics, Algebra I and II, and Geometry, created video game sprites for Super Smash Flash 2, and sat-in on Trigonometry classes at Virginia Polytechnic University. When I was 12, I wrote my first toy interpreter, fostering an interest in programming language theory. I enjoy finding excuses to build interpreters (e.g., I built a custom programming language for Etched's Vestaboards, which are mini Smartboards).

Prior to Instachip, my Verilog community contributions include the Verilog Package Manager and the Verilog Module Registry. At TJ, I

• Designed/taped out three small chips (O(1) matrix-vector multiplication, Vector Processing Unit (US18119437) concept, and more)
• Designed and implemented a programming language for optical computers - a tensor algebra DSL that compiles to an optical processor with better sparse tensor storage than NumPy
• Created a Regex interpreter using Brzozowski derivatives (my favorite project)

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Favorite book: Perfectly Reasonable Deviations from the Beaten Track by Richard Feynman. His letter to Arline Greenbaum, sixteen months after her death. "I love my wife. My wife is dead."

Contact me: sathvik@etched.com